1. Field of the Invention
The present invention relates to a fabrication method of a semiconductor device that improves hot carrier immunity.
2. Background of the Related Art
In a background art method of fabricating a MOSFET (metal oxide semiconductor field effect transistor), an SiO2 film formed by thermal oxidation is generally used as a gate insulating film. However, as semiconductor device integration has increased, channel length has shortened and hot carrier immunity has deteriorated. One improved background art fabrication method increases an energy band between the channel and the gate insulating film. Another improved background art method substitutes a nitrogen oxide film, such as NO or N2O, for the SiO2 film.
FIG. 1A shows a background art fabrication method for a semiconductor device that employs an NO or N2O gate insulating film 101 formed on a semiconductor substrate 100. A polysilicon film and an insulating film are formed and then patterned on the gate insulating film 101 to form a gate electrode 102 and an insulating pattern 103, respectively. Using the insulating pattern 103 as a mask, impurity ions are implanted into the semiconductor substrate 100, to form a shallow impurity layer, or a lightly doped drain (LDD) region 104 in the semiconductor substrate 100 at both sides of the gate electrode 102.
As illustrated in FIG. 1B, an Si3N4 film is then formed as an insulating film over the resultant structure of FIG. 1A, and the SI3N4 film is anisotropically etched to form sidewall spacers 105 on side surfaces of the gate electrode 102 and the insulating pattern 103. Then, high-density impurity ions are implanted into the semiconductor substrate 100 using the insulating pattern 103 and the sidewall spacers 105 as a mask, to form an impurity layer (i.e. source/drain) 106.
The background art methods have various disadvantages. Forming the gate insulating film 101 with the NO or N2O film improves the hot carrier immunity, but decreases the mobility of holes of a p-channel transistor, and thus deteriorates the driving capability of the p-channel transistor.
In addition, while the NO film provides a desirable gate insulating film with excellent hot carrier immunity in a semiconductor memory device divided into a memory cell part and a peripheral circuit part, a silicon oxide film provides an advantageous gate insulating film for the memory cell part. The NO film increases the junction leakage current in the memory cell part, and the refresh cycle is unavoidably shortened. Thus, the gate insulating films of the memory cell and peripheral circuit parts must be formed using different materials. Accordingly, the fabrication method of the conventional semiconductor device is complicated, because the gate insulating film must be formed twice so that the gate insulating film of the memory cell and peripheral circuit parts can be formed sequentially, with the use of a photoresist mask for each step.
It is an object of the present invention to provide a fabrication method for a semiconductor device which improves hot carrier immunity.
It is another object of the present invention to provide a fabrication method for a semiconductor device that has a silicon oxide gate insulating film over a channel region of a transistor and a gate insulating film including nitrogen over an LDD layer to improve hot carrier immunity and prevent loss of mobility of the holes of a p-channel transistor.
It is also an object of the present invention to provide a fabrication method for a semiconductor device that simultaneously forms gate insulating films of a memory cell part and a peripheral circuit and that partially implants nitrogen ions into the gate insulating film of the peripheral circuit part. This results in the formation of a gate insulating film over the peripheral circuit part as an oxide film including nitrogen. The oxide film including nitrogen helps to improve the refresh cycle of the memory cell part and the hot carrier immunity of the peripheral circuit part.
A fabrication method of a semiconductor device embodying the present invention includes the steps of: forming a gate insulating film over a semiconductor substrate; forming a gate electrode on the gate insulating film; implanting low-density impurity ions into the semiconductor substrate at both sides of the gate electrode; forming sidewall spacers on side surfaces of the gate electrode; implanting nitrogen into at least one portion of the gate insulating film adjacent to the gate electrode; and implanting high-density impurity ions into the semiconductor substrate using the gate electrode and sidewall spacers as a mask, wherein the implanted high-density impurity ions form source/drain regions.
A fabrication method of a semiconductor device, embodying the invention, may also include the steps of: forming a gate insulating film over a semiconductor substrate; forming a gate electrode on the gate insulating film; implanting low-density impurity ions into the semiconductor substrate at both sides of the gate electrode wherein a plurality of shallow impurity layers are formed; forming sidewall spacers on side surfaces of the gate electrode; and implanting high-density impurity ions into the semiconductor substrate using the gate electrode and the sidewall spacers as a mask, thereby forming source/drain regions. Fabrication methods embodying the invention may also include a step of implanting nitrogen, by an ion implantation step, into a part of the gate insulating film which is adjacent to outer sides of the gate electrode either before or after forming the sidewall spacers.
An alternative fabrication method of a semiconductor device embodying the present invention includes the steps of: forming a gate insulating film over a semiconductor substrate comprising at least a memory cell part and a peripheral circuit part; forming a gate electrode on the memory cell part and the peripheral circuit part; implanting low-density impurity ions into the semiconductor substrate at both sides of each gate electrode, wherein shallow impurity layers are formed; forming sidewall spacers on at least one side surface of each gate electrode; forming a photoresist mask over the resultant surface of the semiconductor substrate corresponding to the memory cell part; implanting nitrogen ions into the gate insulating film formed under the sidewall spacers of the peripheral circuit part; removing the photoresist mask; and implanting high-density impurity ions into the semiconductor substrate at outer sides of the sidewall spacers, wherein high-density impurity regions which are formed are relatively deeper than the shallow impurity layers.
Another alternative method embodying the present invention includes the steps of: forming a gate insulating film over a semiconductor substrate which includes a memory cell part and a peripheral circuit part; forming gate electrodes on the memory cell part and the peripheral circuit part of the semiconductor substrate; implanting low-density impurity ions into the semiconductor substrate on both sides of each gate electrode, thereby forming shallow impurity layers; forming sidewall spacers on side surfaces of each gate electrode; forming a photoresist mask over the resultant surface of the semiconductor substrate corresponding to the memory cell part; implanting nitrogen ions into the gate insulating film formed under the sidewall spacers of the peripheral circuit part of the semiconductor substrate; removing the photoresist mask; and implanting high-density impurity ions into the semiconductor substrate on opposite sides of the sidewall spacers, thereby forming impurity layers which are relatively deeper than the shallow impurity layers.
A further alternative fabrication method of a semiconductor device embodying the present invention includes the steps of: forming a gate insulating film over a semiconductor substrate comprising at least a memory cell part and a peripheral circuit part; forming a gate electrode on each of the memory cell part and the peripheral circuit part; forming a photoresist mask over the resultant surface of the semiconductor substrate corresponding to the memory cell part; implanting nitrogen ions into at least one portion of the gate insulating film adjacent to the gate electrode formed in the peripheral circuit part; removing the photoresist mask; implanting low-density impurity ions into the semiconductor substrate at both sides of each gate electrode, such that shallow impurity layers are formed; forming sidewall spacers on at least one side surface of each gate electrode; and implanting high-density impurity ions into the semiconductor substrate at outer sides of the sidewall spacers to form impurity layers that are formed relatively deeper than the shallow impurity layers.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.